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EDA and IP

Synopsys posts 13% revenue increase for Q3

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EDA tool and semiconductor IP company, Synopsys, has announced revenue of $1.526bn for Q3 2024, up approximately 13% from Q3 2023. The company also announced it is expecting record full-year revenue with around 15% growth. Reflecting on the results, Sassine Ghazi, Synopsys’ president and CEO attributed a lot of growth to the increased use of AI. “The complexity and pace ...

RISC-V cluster IP for data centre SoCs and chiplets

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SiFive has announced RISC-V core intellectual property for data centre processors. Called P870-D, it is an update of the non-data centre P870, with support added for AMBA CHI protocol. “By harnessing a standard CHI bus,” said SiFive, “the P870-D enables SiFive’s customers to scale up to 256 cores while harnessing industry-standard protocols including CXL [Compute Express Link] and CHI C2C [chip ...

Akeana reveals its RISC-V cores

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Akeana has announced a little about its RISC-V processor intellectual property. There will be three series: 100 Series – configurable 32bit RISC-V cores for embedded microcontrollers 1000 Series – includes 64bit RISC-V cores and a memory management unit, optional support for multi-threading and extensions including: vector, hypervisor and AI computation. 5000 Series – 64bit RISC-V cores optimised for laptops, data ...

Considerations when designing chips for automotive use

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Challenges faced by automotive chip designers include longer than average expected lifespans and rigorous functional safety standards, explains Paul Martin. The expected lifetime for the vast majority of chips is typically a few years, but chips for automotive use have an expected lifespan of 10 to 15 years, to match the lifespan of the average car, and a supply lifetime ...

Siemens adds AI to simulation tools

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The increased complexity of semiconductor designs that need validating is a problem for simulators, says Pradeep Thiagarajan, principal product manager for custom IC verification, introducing Siemens’ Solido Simulation Suite software (Solido Sim). The suite has three new simulators: Solido SPICE, Solido Fast SPICE and Solido LibSPICE software, together with the company’s AFS platform, ELDO software and Symphony software. Solido Sim ...

DAC 2024: embracing chiplets, 3D-IC and AI

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At the 61st DAC, it was clear that the software and silicon worlds are not colliding but meshing together, bringing opportunities for tools to address the challenges complex chip design presents. By Caroline Hayes. The electronic design automation (EDA) industry is benefiting from the evolution of the semiconductor industry in which the lines between systems and semiconductors are becoming meshed ...

IoT security considerations for EDA

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Electronic design automation tools have a role to play in designing secure options for the IoT, says Samudrapom Dam. The IoT has revolutionised different industries, enabling advanced industrial systems, autonomous vehicles and smart homes. As IoT devices become increasingly prevalent, ensuring their security has become crucial. IoT devices are more susceptible to attacks and security threats because security solutions compatible ...

GPNPU has multi-core cluster options for +100TOPS

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The third generation of general-purpose neural processing units (GPNPUs) by Quadric introduces pre-integrated clusters of two, four or eight cores to deliver up to 108 TOPS. This latest iteration has increased performance and optimisations for generative AI. the company has also introduced a safety enhanced version for automotive applications. The company described the Chimera QC series as NPUs with a ...

YorChip predicts 2026 will be the year of the chiplet

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Nearly a year after announcing its strategic partnership with FPGA developer QuickLogic to produce FPGA chiplets, YorChip elaborated on its plans to apply chiplets to more general-purpose applications. Start-up YorChip specialises in UCIe-compatible IP. Last August the company announced a partnership with FPGA provider QuickLogic to collaborate in developing FPGA chiplets optimised for low power consumption and low cost. The ...

Efabless marks chip manufacturing milestone

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At DAC 2024, Efabless celebrated a milestone of 40 commercial companies designed chips using its chipIgnite and Google-sponsored OpenMPW programme. Of these, some are ready for production volumes, the majority are at the prototype/proof of concept stage, said CEO, Michael Wishart. The platform allows start-ups and smaller companies to prototype designs and innovate without having to buy a license, he ...